onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /gpu_interface_tb/rst
add wave -noupdate /gpu_interface_tb/clk
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/wf_to_be_dispatched
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_wf_valid
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_cu_id
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_wg_id
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_wf_count
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_vgpr_start
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_vgpr_size_per_wf
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_sgpr_start
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_sgpr_size_per_wf
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_lds_start
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_gds_start
add wave -noupdate -expand -group issued_wg_data -radix unsigned /gpu_interface_tb/dis_checker/stored_wf_size
add wave -noupdate -expand -group issued_wg_data -radix hexadecimal /gpu_interface_tb/dis_checker/stored_start_pc
add wave -noupdate -group running_wg_data /gpu_interface_tb/cus/running_wf_valid
add wave -noupdate -group running_wg_data /gpu_interface_tb/cus/running_wf_cycle_counter
add wave -noupdate -group running_wg_data /gpu_interface_tb/cus/running_tag
add wave -noupdate -group running_wg_data /gpu_interface_tb/cus/running_cu_id
add wave -noupdate -expand -group inflight_inputs -radix unsigned /gpu_interface_tb/DUT/inflight_wg_buffer_gpu_valid
add wave -noupdate -expand -group inflight_inputs -radix unsigned /gpu_interface_tb/DUT/inflight_wg_buffer_gpu_wf_size
add wave -noupdate -expand -group inflight_inputs -radix hexadecimal /gpu_interface_tb/DUT/inflight_wg_buffer_start_pc
add wave -noupdate -expand -group inflight_inputs -radix unsigned /gpu_interface_tb/DUT/inflight_wg_buffer_gpu_vgpr_size_per_wf
add wave -noupdate -expand -group inflight_inputs -radix unsigned /gpu_interface_tb/DUT/inflight_wg_buffer_gpu_sgpr_size_per_wf
add wave -noupdate -expand -group allocator_inputs /gpu_interface_tb/DUT/dis_controller_wg_alloc_valid
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_wg_id_out
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_cu_id_out
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_wf_count
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_vgpr_start_out
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_sgpr_start_out
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_lds_start_out
add wave -noupdate -expand -group allocator_inputs -radix unsigned /gpu_interface_tb/DUT/allocator_gds_start_out
add wave -noupdate -expand -group allocator_inputs /gpu_interface_tb/DUT/dis_controller_wg_dealloc_valid
add wave -noupdate -expand -group cu_inputs /gpu_interface_tb/DUT/cu2dispatch_wf_done
add wave -noupdate -expand -group cu_inputs -radix unsigned -childformat {{{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[119]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[118]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[117]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[116]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[115]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[114]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[113]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[112]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[111]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[110]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[109]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[108]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[107]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[106]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[105]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[104]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[103]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[102]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[101]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[100]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[99]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[98]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[97]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[96]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[95]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[94]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[93]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[92]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[91]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[90]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[89]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[88]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[87]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[86]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[85]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[84]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[83]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[82]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[81]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[80]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[79]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[78]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[77]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[76]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[75]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[74]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[73]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[72]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[71]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[70]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[69]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[68]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[67]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[66]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[65]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[64]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[63]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[62]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[61]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[60]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[59]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[58]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[57]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[56]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[55]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[54]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[53]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[52]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[51]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[50]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[49]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[48]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[47]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[46]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[45]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[44]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[43]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[42]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[41]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[40]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[39]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[38]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[37]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[36]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[35]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[34]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[33]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[32]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[31]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[30]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[29]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[28]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[27]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[26]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[25]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[24]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[23]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[22]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[21]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[20]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[19]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[18]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[17]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[16]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[15]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[14]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[13]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[12]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[11]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[10]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[9]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[8]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[7]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[6]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[5]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[4]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[3]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[2]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[1]} -radix unsigned} {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[0]} -radix unsigned}} -subitemconfig {{/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[119]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[118]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[117]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[116]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[115]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[114]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[113]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[112]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[111]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[110]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[109]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[108]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[107]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[106]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[105]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[104]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[103]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[102]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[101]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[100]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[99]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[98]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[97]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[96]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[95]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[94]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[93]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[92]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[91]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[90]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[89]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[88]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[87]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[86]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[85]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[84]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[83]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[82]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[81]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[80]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[79]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[78]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[77]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[76]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[75]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[74]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[73]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[72]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[71]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[70]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[69]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[68]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[67]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[66]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[65]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[64]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[63]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[62]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[61]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[60]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[59]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[58]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[57]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[56]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[55]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[54]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[53]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[52]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[51]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[50]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[49]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[48]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[47]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[46]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[45]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[44]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[43]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[42]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[41]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[40]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[39]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[38]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[37]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[36]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[35]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[34]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[33]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[32]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[31]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[30]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[29]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[28]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[27]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[26]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[25]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[24]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[23]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[22]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[21]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[20]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[19]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[18]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[17]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[16]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[15]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[14]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[13]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[12]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[11]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[10]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[9]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[8]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[7]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[6]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[5]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[4]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[3]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[2]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[1]} {-height 13 -radix unsigned} {/gpu_interface_tb/DUT/cu2dispatch_wf_tag_done[0]} {-height 13 -radix unsigned}} /gpu_interface_tb/DUT/cu2dispatch_wf_tag_done
add wave -noupdate -expand -group dispatcher_facing_outputs -radix unsigned /gpu_interface_tb/DUT/gpu_interface_alloc_available
add wave -noupdate -expand -group dispatcher_facing_outputs -radix unsigned /gpu_interface_tb/DUT/gpu_interface_dealloc_available
add wave -noupdate -expand -group dispatcher_facing_outputs -radix unsigned /gpu_interface_tb/DUT/gpu_interface_cu_id
add wave -noupdate -expand -group dispatcher_facing_outputs -radix unsigned /gpu_interface_tb/DUT/gpu_interface_dealloc_wg_id
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_wf_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_wg_wf_count
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_wf_size_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_sgpr_base_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_vgpr_base_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_wf_tag_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_lds_base_dispatch
add wave -noupdate -expand -group cu_facing_outputs -radix unsigned /gpu_interface_tb/DUT/dispatch2cu_start_pc_dispatch
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/chosen_done_cu_valid
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/chosen_done_cu_valid_comb
add wave -noupdate -expand -group dealloc_logic -radix unsigned /gpu_interface_tb/DUT/chosen_done_cu_id
add wave -noupdate -expand -group dealloc_logic -radix unsigned /gpu_interface_tb/DUT/chosen_done_cu_id_comb
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/dealloc_st
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/handler_wg_done_valid
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/handler_wg_done_wg_id
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/handler_wg_done_ack
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/cu2dispatch_wf_done_i
add wave -noupdate -expand -group dealloc_logic /gpu_interface_tb/DUT/cu2dispatch_wf_tag_done_i
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/handler_wg_alloc_en
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/handler_wg_alloc_wg_id
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/handler_wg_alloc_wf_count
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/alloc_st
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/dispatch2cu_wf_dispatch_handlers
add wave -noupdate -group alloc_logic /gpu_interface_tb/DUT/dispatch2cu_wf_tag_dispatch_handlers
add wave -noupdate -radix unsigned {/gpu_interface_tb/DUT/handlers[5]/cu2dispatch_wf_done_i}
add wave -noupdate -radix unsigned {/gpu_interface_tb/DUT/handlers[5]/cu2dispatch_wf_tag_done_i}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/dealloc_st}
add wave -noupdate -radix unsigned {/gpu_interface_tb/DUT/handlers[5]/curr_dealloc_wg_slot}
add wave -noupdate -radix unsigned {/gpu_interface_tb/DUT/handlers[5]/curr_dealloc_wf_counter}
add wave -noupdate -radix unsigned {/gpu_interface_tb/DUT/handlers[5]/curr_dealloc_wf_id}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/pending_wg_bitmap}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/pending_wf_bitmap}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/used_slot_bitmap}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/curr_alloc_wf_count}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/curr_alloc_wf_slot}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/dispatch2cu_wf_dispatch}
add wave -noupdate {/gpu_interface_tb/DUT/handlers[5]/dispatch2cu_wf_tag_dispatch}
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{got stuck at second wg} {4565 ns} 1} {{tag 257 retirement} {4255 ns} 1} {{Cursor 3} {1515 ns} 0}
quietly wave cursor active 3
configure wave -namecolwidth 563
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ns} {49920 ns}
